The present invention claims the benefit of Korean Patent Application No. 2000-79355, filed in Korea on Dec. 20, 2000, which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to an array substrate for use in electronic equipment. More particularly it relates to an etchant and an etching method for liquid crystal display devices having copper (Cu) lines.
2. Discussion of the Related Art
Metal lines in electronic equipment generally serve to apply signals to electronic elements. The metal lines contribute to production costs and stability of the electronic equipment. Accordingly, a material to form the metal lines needs to be inexpensive, have a low electrical resistance, and a high corrosion resistance.
Array substrates are commonly used in liquid crystal display (LCD) devices. The performance characteristics and operational properties of the array substrates are partially determined by the material with which individual elements of the array substrates are formed. For example, gate and data lines of the array substrate have significant influence on the performance characteristics and operational properties of the array substrate. Although resistivity of the materials used to form the gate and data lines is relatively insignificant in small-sized LCD devices, the resistivity of the gate and data lines in large-sized LCD devices, especially over 18 inches, determines picture quality. Therefore, in large LCD devices having high resolution, materials with which to form the gate and data lines includes Aluminum (Al) or Al-alloy because of their low electrical resistance.
However, pure aluminum is chemically weak when exposed to acidic processing, and may result in formation of hillocks on surfaces of the gate line and gate electrode during high temperature processing. Furthermore, the occurrence of hillocks may cause extraordinary growth of gate insulation layer formed on the gate line and gate electrode. Thus, the gate insulation layer may be destroyed, and an electrical short circuit may occur between the gate electrode and an active layer that is formed on the gate insulation layer. Accordingly, thin film transistor (TFTs) having gate lines and gate electrodes formed from pure aluminum do not adequately function as switching devices.
To overcome these problems, aluminum alloys such as aluminum neodymium (AlNd) are used for the gate line and gate electrode. In addition, a multi-layered aluminum structure is used for the gate line and the gate electrode. Specifically, the aluminum (Al) layer is stacked with a molybdenum (Mo) layer having a high corrosion resistance and durability. However, if the multi-layered aluminum structure is used for the gate line, additional manufacturing processes are required. Therefore, copper (Cu), which is cheap and has low electrical resistance, is proposed to be used as the gate line, thereby decreasing a total number of manufacturing processes.
FIG. 1 is a schematic partial plan view illustrating an array substrate for use in a liquid crystal display device according to the related art, and FIG. 2 is a cross-sectional view taken along IIxe2x80x94II of FIG. 1. In FIGS. 1 and 2, an array substrate 10 includes a pixel region xe2x80x9cPxe2x80x9d having a corresponding thin film transistor (TFT) xe2x80x9cTxe2x80x9d and a pixel electrode 42. Gate lines 13 are arranged in a transverse direction and data lines 15 are arranged in a longitudinal direction such that each pair of the gate lines 13 and the data lines 15 define a pixel region xe2x80x9cPxe2x80x9d. The TFT xe2x80x9cTxe2x80x9d includes a gate electrode 32, a source electrode 34, a drain electrode 36, and a semiconductor layer 38. The gate electrode 32 of the TFT xe2x80x9cTxe2x80x9d extends from the gate line 13, while the source electrode 34 of the TFT xe2x80x9cTxe2x80x9d extends from the data line 15. A gate insulation layer 24 is formed on the substrate 10 to cover the gate electrode 32 and gate line 13. The drain electrode 36 is spaced apart from the source electrode 34, and the semiconductor layer 38 is disposed on the gate insulation layer 24, especially over the gate electrode 32. The semiconductor layer 38 is divided into an active layer 38a, and an ohmic contact layer 38b. The active layer 38a is made of pure amorphous silicon, while the ohmic contact layer 38b is made of impurity-included amorphous silicon. Since the ohmic contact layer 38b is attached to the source electrode 34 and drain electrode 36, the ohmic contact layer 38b decreases the contact resistance between the active layer 38a, and the source 34 and drain 36 electrodes. The source electrode 34 and the drain electrode 36 overlap opposite ends of the gate electrode 32. A passivation layer 39 is disposed on a whole surface of the substrate 10 to protect the TFT xe2x80x9cTxe2x80x9d and data line 15. The passivation layer 39 has a drain contact hole 40 over the drain electrode 36 such that a portion of the pixel electrode 42 overlaps a portion of the drain electrode 36, and electrically contacts the drain electrode 36 through the drain contact hole 40.
Within the structure and configuration of the active matrix liquid crystal display (AM-LCD) device described in FIGS. 1 and 2, aluminum (Al) is usually used for the gate line 13 to reduce RC-delay.
FIG. 3 is a table showing characteristics of the metal that can be used for lines in electronic equipment according to the related art. Among the metallic materials shown in FIG. 3, aluminum (Al) or chromium (Cr) is used for the metal lines in a conventional array substrate. However, although aluminum (Al) has a low electrical resistance and superior adhesive strength, aluminum is susceptible to damage from exposure to heat and acid. Therefore, it is proposed that copper (Cu), which has a low resistance and low cost, be utilized as the metal lines in the array substrate.
When forming the gate line using copper (Cu), ammonium persulfate ((NH4)2S2O8) is generally used as an etchant to etch the Cu layer to form the Cu gate line. However, forming the data line using copper (Cu) is problematic. First, when forming the data line using copper (Cu), the source and drain electrodes are also made of copper (Cu). However, a silicon component of a corresponding semiconductor layer reacts with the Cu component of the source and drain electrodes, thereby forming an intermediate layer between the Cu source and drain electrodes and the semiconductor silicon layer. The intermediate layer has a negative influence on the electrical characteristics of the corresponding thin film transistor (TFT).
Second, if another metal such titanium (Ti) or molybdenum (Mo) is disposed between the Cu layer and the semiconductor layer to overcome the above-mentioned problem, the etchant must simultaneously etch the two metal layers (Cuxe2x80x94Ti or Cuxe2x80x94Mo). To etch the double-layered metal layers (Cuxe2x80x94Ti or Cuxe2x80x94Mo), it is widely known that hydrogen fluoride (HF) or oxygen-based etching solution is generally used as an etchant. However, the HF etchant etches not only the double-layered metal layers but also the glass substrate and the insulation layer that is made of silicon nitride (SiNX) or silicon oxide (SiOX). As a result, the HF etchant creates significant damage to the insulation layer, thereby compromising performance characteristics of the gate line and the gate electrode that are protected by the insulation layer. Accordingly, it is very difficult to form the data line, the source electrode, and the drain electrode from copper (Cu).
Accordingly, the present invention is directed to an etchant and an array substrate having copper lines etched by the etchant that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide an etchant which simultaneously etches a double-layered metal layer.
Another object of the present invention is to provide a method of forming an array substrate having copper lines and electrodes.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the etchant and array substrate having copper lines etched by the etchant includes an etchant including hydrogen peroxide (H2O2), and a mixed solution including at least one of an organic acid, an inorganic acid, and a neutral salt.
In another aspect, a method of forming an array substrate for use in a thin film transistor liquid crystal display (TFT-LCD) device includes forming a first metal layer on a substrate, patterning the first metal layer to form a gate line and a gate electrode extended from the gate line, forming a gate insulation layer on the substrate to cover the patterned first metal layer, forming an active layer on the gate insulation layer and over the gate electrode, forming an ohmic contact layer on the active layer, forming a second metal layer on the gate insulation layer to cover the ohmic contact layer and the active layer, forming a third metal layer on the second metal layer, simultaneously patterning the second metal layer and the third metal layer to form a double-layered data line, a double-layered source electrode and a double-layered drain electrode using an etchant that includes hydrogen peroxide (H2O2), a H2O2 stabilizer, and at least one of an organic acid, an inorganic acid and a neutral salt, and forming a pixel electrode contacting the double-layered drain electrode.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.